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24C02C
8.0
READ OPERATION
8.2
Random Read
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
slave address is set to one. There are three basic types
of read operations: current address read, random read,
and sequential read.
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
24C02C as part of a write operation. After the word
address is sent, the master generates a Start condition
8.1
Current Address Read
following the acknowledge. This terminates the write
operation, but not before the internal Address Pointer is
The 24C02C contains an address counter that main-
tains the address of the last word accessed, internally
incremented by one. Therefore, if the previous read
access was to address n, the next current address read
operation would access data from address n + 1. Upon
receipt of the slave address with the R/W bit set to one,
the 24C02C issues an acknowledge and transmits the
eight bit data word. The master will not acknowledge
the transfer, but does generate a Stop condition and the
set. Then the master issues the control byte again but
with the R/W bit set to a one. The 24C02C will then
issue an acknowledge and transmits the eight bit data
word. The master will not acknowledge the transfer but
does generate a Stop condition and the 24C02C
discontinues transmission (Figure 8-2). After this
command, the internal address counter will point to the
address location following the one that was just read.
24C02C discontinues transmission (Figure 8-1).
8.3
Sequential Read
Data
FIGURE 8-1:
Bus Activity
Master
S
T
A
R
T
CURRENT ADDRESS
READ
Control
Byte
S
T
O
P
Sequential reads are initiated in the same way as a
random read except that after the 24C02C transmits
the first data byte, the master issues an acknowledge
as opposed to a Stop condition in a random read. This
directs the 24C02C to transmit the next sequentially
addressed 8-bit word (Figure 8-3).
SDA line
Bus Activity
S
A
C
K
N
O
A
C
K
P
To provide sequential reads, the 24C02C contains an
internal Address Pointer which is incremented by one
at the completion of each operation. This Address
Pointer allows the entire memory contents to be serially
read during one operation. The internal Address
Pointer will automatically roll over from address FF to
address 00.
FIGURE 8-2:
RANDOM READ
S
S
Bus Activity
Master
T
A
R
Control
Byte
Word
Address (n)
T
A
R
Control
Byte
Data (n)
S
T
O
T
T
P
SDA line
Bus Activity
S
A
C
K
A
C
K
S
A
C
K
N
O
A
P
C
K
FIGURE 8-3:
SEQUENTIAL READ
Bus Activity
Master
Control
Byte
Data n
Data n + 1
Data n + 2
Data n + X
S
T
O
P
SDA line
P
A
C
A
C
A
C
A
C
N
O
Bus Activity
K
K
K
K
A
C
K
? 2008 Microchip Technology Inc.
DS21202J-page 11
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